The synthesis of different signals is commonplace in several applications. A typical example is the generation of multiphase clock signals by means of a Phase Locked Loop (PLL). The purpose of multiphase clock synthesizers based on PLL structures is the production of a high frequency clock signal with several phases (ideally evenly spaced in time), starting from a low frequency single phase reference clock. Typical applications of such PLLs are, for example, the internal base generation in oversampling data recovery circuits.
The core of the above-described PLLs is a harmonic N-phases Voltage Controlled Oscillator (VCO). The VCO consists of N single ended, or N/2 differential, identical stages connected in a ring, wherein each stage is based on an LC tank.
Harmonic VCOs are generally preferred to ring or relaxation VCOs in all those applications where phase noise requirements (i.e., “phase jitter” in the time domain) are very strict. The phase noise performances of a harmonic VCO are better than the ones of a ring or relaxation VCO, because the energy stored in the reactive elements of the LC tanks is typically much higher than the energy required to sustain the oscillations; since the ratio between said two energies equals the quality factor Q of the resonator, the harmonic VCO has a high quality factor that is much higher than unity (while in the other cases this ratio is close to unity).
However, providing clock signals with several evenly spaced phases using harmonic VCOs is more difficult than providing them with ring or relaxation VCOs. The major difficulties reside in the design of couplers that connect adjacent stages in the ring.
One of the simplest couplers known in the art is a differential pair that receives the clock signal generated by an adjacent stage and injects a corresponding current into the associated stage. A disadvantage of this solution is that the current injected by each coupler into its stage has a phase difference with respect to the clock signal that the stage itself has to generate. This implies that each stage is forced to work out of its maximum quality factor range, thereby degrading the phase noise performances.
A method for resolving this problem consists of lowering the module of the injected current, so as to reduce the effect of the phase difference on the generated clock signal. However, this solution may weaken the coupling between the stages, thus involving a low accuracy of the phase spacing between the different clock signals.
A more effective method is to shift the phase of the injected current by an amount such as to reduce its phase difference. In this way, the aforementioned drawbacks are mitigated without lowering the coupling effect.
According to a solution known in the art, the coupler includes a phase shifter that shifts the phase of the injected current by means of a high-pass filter implemented with a capacitive degenerated differential pair. However, the injected current thus provided includes a series of unwanted pulses generated by the high frequency harmonics that the high-pass filter enhances.
A different solution that avoids this drawback is based on a low-pass filter, which is implemented by means of a differential cascode pair. In this case, however, the phase difference often can only be reduced by a small amount (for example 10-20 degrees), and even this small amount may be difficult to control. Moreover, the use of a differential cascode pair necessitates a high-voltage power supply for allowing the correct voltage swing of the clock signals.